Siracusa: A Low-Power On-Sensor RISC-V SoC for Extended Reality Visual Processing in 16nm CMOS

Extended Reality (XR) has become increasingly popular in recent years, with applications in entertainment, education, healthcare, and more. However, mass adoption of XR technology still faces several challenges in meeting stringent latency and power consumption requirements. On-sensor computing, where a capable XR processor is tightly packaged with an image sensor, is a promising technology that can help address these challenges as it provides several benefits, including reduced data analysis latency, low power consumption, small form factor, and greater privacy. This work introduces Siracusa, an on-camera computing platform for next-generation XR devices. Siracusa features a flexible mixed-precision Machine Learning (ML) accelerator and a cluster of application-tuned RISC-V cores, sharing a highly configurable on-chip memory hierarchy designed to minimize expensive data copies. As a result, Siracusa achieves a peak energy efficiency of 9.9 T O p/ J for deep neural network (DNN) inference, an increase of 1.2 x compared to similar designs, while supporting complex, heterogeneous application workloads, which combine ML with conventional signal processing and control.