Characterization and Modeling of 22 nm FDSOI Cryogenic RF CMOS

Wriddhi Chakraborty*, Khandker Akif Aabrar, Jorge Gomez, Rakshith Saligram, Arijit Raychowdhury, Patrick Fay, Suman Datta

*Autor correspondiente de este trabajo

Producción científica: Contribución a una revistaArtículorevisión exhaustiva

14 Citas (Scopus)


Analog and RF mixed-signal cryogenic-CMOS circuits with ultrahigh gain-bandwidth product can address a range of applications such as interface circuits between superconducting (SC) single-flux quantum (SFQ) logic and cryo-dynamic random-access memory (DRAM), circuits for sensing and controlling qubits faster than their decoherence time for at-scale quantum processor. In this work, we evaluate RF performance of 18 nm gate length (LG) fully depleted silicon-on-insulator (FDSOI) NMOS and PMOS from 300 to 5.5 K operating temperature. We experimentally demonstrate extrapolated peak unity current-gain cutoff frequency (fT) of 495/337 GHz (1.35 ×/1.25 × gain over 300 K) and peak maximum oscillation frequency (fMAX) of 497/372 GHz (1.3 × gain) for NMOS/PMOS, respectively, at 5.5 K. A small-signal equivalent model is developed to enable design-space exploration of RF circuits at cryogenic temperature and identify the temperature-dependent and temperature-invariant components of the extrinsic and the intrinsic FET. Finally, performance benchmarking reveals that 22 nm FDSOI cryogenic RF CMOS provides a viable option for achieving superior analog performance with giga-scale transistor integration density.

Idioma originalInglés
Páginas (desde-hasta)184-192
Número de páginas9
PublicaciónIEEE Journal on Exploratory Solid-State Computational Devices and Circuits
EstadoPublicada - 1 dic. 2021
Publicado de forma externa

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© 2014 IEEE.


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