Exploring the voltage divider approach for accurate memristor state tuning

Ioannis Vourkas, Jorge Gómez, Ángel Abusleme, Nikolaos Vasileiadis, Georgios Ch Sirakoulis, Antonio Rubio

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

9 Scopus citations

Abstract

The maximum exploitation of the favorable properties and the analog nature of memristor technology in future nonvolatile resistive memories, requires accurate multi-level programming. In this direction, we explore the voltage divider (VD) approach for highly controllable multi-state SET memristor tuning. We present the theoretical basis of operation, the main advantages and weaknesses. We finally propose an improved closed-loop VD SET scheme to tackle the variability effect and achieve <1% tuning precision, on average 3× faster than another accurate tuning algorithm of the recent literature.

Original languageEnglish
Title of host publicationLASCAS 2017 - 8th IEEE Latin American Symposium on Circuits and Systems, R9 IEEE CASS Flagship Conference
Subtitle of host publicationProceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509058594
DOIs
StatePublished - 13 Jun 2017
Externally publishedYes
Event8th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2017 - Bariloche, Argentina
Duration: 20 Feb 201723 Feb 2017

Publication series

NameLASCAS 2017 - 8th IEEE Latin American Symposium on Circuits and Systems, R9 IEEE CASS Flagship Conference: Proceedings

Conference

Conference8th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2017
Country/TerritoryArgentina
CityBariloche
Period20/02/1723/02/17

Bibliographical note

Publisher Copyright:
© 2017 IEEE.

Keywords

  • memristor
  • multi-level storage
  • resistive RAM
  • resistive switching
  • tuning
  • voltage divider

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