Abstract
The maximum exploitation of the favorable properties and the analog nature of memristor technology in future nonvolatile resistive memories, requires accurate multi-level programming. In this direction, we explore the voltage divider (VD) approach for highly controllable multi-state SET memristor tuning. We present the theoretical basis of operation, the main advantages and weaknesses. We finally propose an improved closed-loop VD SET scheme to tackle the variability effect and achieve <1% tuning precision, on average 3× faster than another accurate tuning algorithm of the recent literature.
Original language | English |
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Title of host publication | LASCAS 2017 - 8th IEEE Latin American Symposium on Circuits and Systems, R9 IEEE CASS Flagship Conference |
Subtitle of host publication | Proceedings |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
ISBN (Electronic) | 9781509058594 |
DOIs | |
State | Published - 13 Jun 2017 |
Externally published | Yes |
Event | 8th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2017 - Bariloche, Argentina Duration: 20 Feb 2017 → 23 Feb 2017 |
Publication series
Name | LASCAS 2017 - 8th IEEE Latin American Symposium on Circuits and Systems, R9 IEEE CASS Flagship Conference: Proceedings |
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Conference
Conference | 8th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2017 |
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Country/Territory | Argentina |
City | Bariloche |
Period | 20/02/17 → 23/02/17 |
Bibliographical note
Publisher Copyright:© 2017 IEEE.
Keywords
- memristor
- multi-level storage
- resistive RAM
- resistive switching
- tuning
- voltage divider